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Altera_Forum
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14 years ago

TSE with SGDMA Busy problem

I have a system with 2 CPUs. I have a working system where I have connected up a TSE to 2 seperate SGDMAs (Rx & Tx) and 2 seperate memories (Rx & Tx) which is controlled by the first CPU. We ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Hi,

We use a descriptor chain of length 2. the first descriptor command field is set to 0x85, the second one is set to 0. In addition to not seeing the busy cleared we also don't see the 0x85 in the first descriptor cleared. The packet is actually sent but without the end of packet signal. This in turn causes the receiver to get the data but not realize that it's complete.

Thanks