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Altera_Forum
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14 years agoTSE with SGDMA Busy problem
I have a system with 2 CPUs. I have a working system where I have connected up a TSE to 2 seperate SGDMAs (Rx & Tx) and 2 seperate memories (Rx & Tx) which is controlled by the first CPU. We ...
Altera_Forum
Honored Contributor
14 years agoCris72,
Thanks for getting back to me so quickly. The Run BIT is still set -we still read a value of 0x85 from the Control Field inside the Descriptor. This is quite an annoying issue as I copied the exact connections as I had made with the 1st CPU (and double checked it). I am at a bit of a loss what to do next other than look into the RTL viewer and start poking around at signals - but this seems a little bit of daunting task since I know very little about the system and how it functions ! --- Quote Start --- I heard myself this statement a million times... and I usually answer asserting the same for hw side :D --- Quote End --- I have a similar running joke here that at the start or end of most Hardware software interface "meetings" the blame is always attributed to the :wacko:other side:wacko: :p