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Altera_Forum
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13 years ago

TSE with SGDMA Busy problem

I have a system with 2 CPUs. I have a working system where I have connected up a TSE to 2 seperate SGDMAs (Rx & Tx) and 2 seperate memories (Rx & Tx) which is controlled by the first CPU. We ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Has the RUN bit in control register been cleared after completion of dma transfer?

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The software engineer has told me he is using exactly the same code as he used for the first system

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I heard myself this statement a million times... and I usually answer asserting the same for hw side :D