TSE_MAC and memory

Hi AsValdr,

Exactly the same as me, the sgdma wait for receive the descriptor chain.

Are you using SOPC or QSYS ?

I don't know why there is a problem with the descriptor.

Maybe a problem with the connnection with the on-chip memory of the descriptor ?

Can you tell me if you it works if you re-add the sram controller like the original project ?

I don't If there is some people from Altera in this forum ?

Maybe some other developpers can test the same thing and tell us if it work or not ?

Thanks.

ps: I debug the sgdma and see that the descriptor chain is not receiv.