Forum Discussion
Deshi_Intel
Regular Contributor
7 years agoHi Leon,
The other thing is are you using Intel FPGA CV dev kit board or your own board for hardware testing ?
- If you are using your own board then have you cross check to ensure all the clock, reset and FPGA power connection is stable and correct ?
I dig some search and found out we do have application note doc providing CV TSE RGMII reference design (page 16) and guideline on how to perform internal MAC loopback test (page 17)
This will be a good start to try bring up TSE IP using golden reference design first then only slowly port over to test your own design.
Thanks.
Regards,
dlim