Tightly coupled memory and C2H

I've never tried that before but it should work. Be sure to dual port the tightly coupled memory and use a connection pragma so that C2H masters the 2nd memory port. By definition tightly coupled memory ports must be a 1:1 connection with a tightly coupled Nios II master. So that means you can't have C2H accessing the same memory port that the Nios II tightly coupled master connects to.

Nios II <---------------------->Port s1 of the dual port memory (read latency 1)

C2H (using pragmas) <----->Port s2 of the dual port memory (read latency of 1 or 2)

By the way, if some of you are wondering how to eliminate some of the overhead of calling the C2H generated hardware accelerator, this is one method since you don&#39;t have to flush the data cache (assuming this is all the shared memory your accelerator needs to access).

I hope that helps,

JCJB