Forum Discussion
3 Replies
- Altera_Forum
Honored Contributor
same for me
I have a System in in QuartusII with two CPUs named 'cpu_0' and 'cpu_1' and two JTAG Uart components named 'jtag_uart_0' and 'jtag_uart_1' In my BSP's system.h, the CPU and JTAG devices are named correctly ('cpu_0' and 'jtag_uart_0') In my NiosII Application Project in the Nios2SBT, under "Debug Configurations/Target Connection" in the Processors view, I have two processors named 'nios2_1' and 'nios2_0' and two byte stream devices named 'jtaguart_0' and 'jtaguart_1' (assuming that I have programmed my hardware design beforehand, of course) don't have a fix for this problem yet any ideas where this mismatch does come from? - Altera_Forum
Honored Contributor
My guess is that in the Nios2SBT your BSP isn't using the correct .sopcinfo file. IIRC you can't change it so it may be easier to delete your BSP and recreate a new one.
- Altera_Forum
Honored Contributor
Have the same problem - does not matter, how do I name the JTAG UART in my system, the byte stream device is named "jtaguart_0". Only way to get it working is to name the JTAG UART in this way (jtaguart_0) from the very beginning...
Any thoughts how to solve this issue ? Quartus/Qsys v13.1, web edition