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I did mean SDRAM, not SRAM, it was a typo so my mistake!
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No problem. The sustained performance of the SDRAM needs to meet your I/O requirement.
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I would like to use my USB Blaster cable to load the file into the memory. Currently the file is in a normal text file with 1s and 0s, and I am guessing this is incorrect and needs to be changed to something else.
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The Avalon-MM bridge Tcl commands like master_write_32 take 32-bit Tcl variables. I tend to use hexadecimal values in files, read them in Tcl, and write them using the Tcl commands.
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I tried opening the nios2-terminal (I have no experience using this) but it told me there are no JTAG UARTs available which match the --device and --instance options.
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If you wanted to go this route, then you also need to write the software on the NIOS processor, and simulate the NIOS system.
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Perhaps the JTAG-to-Avalon-MM option would be easier. I am afraid I have little experience interacting with any of the Nios components. (I do have SDRAM Avalon MM slave and EPCS_Controller Avalon MM slave already incorporated in the Nios CPU however).
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I'd recommend using the JTAG-to-Avalon-MM route.
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If I understand one way to do implement this:
1) Format text file
2) Load into SDRAM using USB Blaster via JTAG
3) Load data from SDRAM into FIFO
4) Connect pin to read from FIFO at 400Mbps
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The text file can be whatever format you like. You can read the file using Tcl, and then reformat the data there. Then you would write to SDRAM using the JTAG-to-Avalon-MM commands.
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Any help or advice would be greatly appreciated. I am scouring tutorials, examples, and forum posts to figure these steps out, but I am having difficulties.
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There is a webinar on how to use the components. Its not too bad.
Let me know if you get stuck and I can probably put together an example pretty easily. What board are you using?
Cheers,
Dave
Honored Contributor
