Sundry problems on NIOS examples

Hi all,

(1) I came across a few stray mails as per which, while using SOPC Builder, we should follow some name conventions. And we should not arbitrarily name the components. Like a flash component should end with "_flash" phrase etc. I tried to find out this reference but coudn't get it. Where is this info given?

(2) This is a minor problem but I want to know if there is any specific reason. When I create my system in SOPC Builder then if I have used multiple tri-state bridges or buses, the corresponding bsf file of the generated system generally groups them in the diagram. The groups are separated by dotted lines in the same diagram box. However, of late, I am generating my system using more than one tri-state bridges and the bsf is not grouped up as described. What could be the possible source of error?

(3) In the full featured example design, the system so generated has separate byteenable signals for ext_ram and lan_91c111 which use the same tri-state bridge. However when I make a system where these two components share the same tri_state_bridge only one byteenable signal is generated, which seem to be shared by both the components. How we can make the shared signal separated?

(4) For ext_flash, the system doesn't generate any signal whioch should be conected to the Ready/Busy# pin of AMD flash chip on NIOS develoment Board. But in the schematic pdf, this signal is shown connected with the FPGA. Is it tri-stated inside. In that case, can I also leave it just open (outside FPGA) in my board?