Forum Discussion
Altera_Forum
Honored Contributor
14 years agoStrange Nios latency
I have SOPC Nios system with onchip_mem. Program (resides in onchip_mem) works very slowly. In SignalTab I see strange Nios latency. Time between two simple writes is 48 Nios clock cycles! Wh...
Altera_Forum
Honored Contributor
14 years ago --- Quote Start --- --- Quote End --- Onchip is 32bit wide. One IOWR (Nios IDE> Disassembly Window) have 4 instruction. So the time between real write (stwio) is 5 cycles. I have 55 cycles (for this code) >> 11 cycles for 1 instruction. ??? :mad: IOWR(0x00020000, 0x1, 0x1); 0x0001007c <main+32>: movhi r3,2 0x00010080 <main+36>: addi r3,r3,4 0x00010084 <main+40>: movi r2,1 0x00010088 <main+44>: stwio r2,0(r3) IOWR(0x00020000, 0x2, 0x2); 0x0001008c <main+48>: movhi r3,2 0x00010090 <main+52>: addi r3,r3,8 0x00010094 <main+56>: movi r2,2 0x00010098 <main+60>: stwio r2,0(r3)