Thanks for replying.
In fact the custom board has a little bit faster memory than the Nios development board.
I think that is a software problem because I can read and write to the external SRAM (all address memory) with a small C-code in the internal FPGA ram. I've used an oscilloscope to check that the signals really go through.
I use NiosII IDE with a download JTAG cable. Is there any other way to put the .txt .rodata and .rwdata in the external SRAM and check it?
Maybe it is due to a SOPC configuration, but I have selected reset and exception address to the external Sram, and selected "unspecified board" as a target. The sram is conected to the avalon bus as it was in the standard configuration.
I'm going to make a program to turn on a led. With my C-code I will copy the memory address of the internal ram to the Sram, and then programm the .sof file of the fpga and see if it reads the external Sram. It's a little crazy but I don't know what to do.