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Altera_Forum's avatar
Altera_Forum
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14 years ago

SPI Problems

Hi, I'm trying to get handle with the SPI on a Nios II Core but I don't get it. I have a SPI master and a SPI Slave that I can try to transmit some data from the master to the slave. I connecte...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

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I changed the waiting completion loop like you told me and it doesn't work. I also tried instead to wait on the TRDY-Flag to wait on the RRDY-Flag because how far I understand if the RRDY-Flag is "1" it is possible to read the register. But it also doesn't work.

I`m also checked the setup in QSYS of the both SPI Cores and till the difference that one is a master and the other one is a slave they have the same setting in relation to the clock polarity and phase. So may I change the setting for the slave or the master? Or what can I do farther?

Thanks in advance for your help!

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