SPI Problems

The correct procedure is something like this:

// select slave (not required in single slave system)

IOWR_ALTERA_AVALON_SPI_SLAVE_SEL(master_base, n_slave);

// assert CS

IOWR_ALTERA_AVALON_SPI_CONTROL(master_base, ALTERA_AVALON_SPI_CONTROL_SSO_MSK);

// wait tx channel ready

do

{

status = IORD_ALTERA_AVALON_SPI_STATUS(master_base);

}

while (((status & ALTERA_AVALON_SPI_STATUS_TRDY_MSK) == 0) &&

(status & ALTERA_AVALON_SPI_STATUS_RRDY_MSK) == 0);

// (optional) data possibly to be transmitted back from slave to master upon request

IOWR_ALTERA_AVALON_SPI_TXDATA(slave_base, data_answer);

// tx data

IOWR_ALTERA_AVALON_SPI_TXDATA(master_base, data_tx);

// this will initiate the transfer; in the same time the slave sends out on miso pin

// the data ready in its tx register

// Wait until the interface has finished transmitting

do

{

status = IORD_ALTERA_AVALON_SPI_STATUS(master_base);

}

while ((status & ALTERA_AVALON_SPI_STATUS_TMT_MSK) == 0);

// release CS

IOWR_ALTERA_AVALON_SPI_CONTROL(master_base, 0);

// read received data from slave

data_rx = IORD_ALTERA_AVALON_SPI_RXDATA(slave_base);

// data_rx must match data_tx

// (optional) read answer from master

recvd_answer = IORD_ALTERA_AVALON_SPI_RXDATA(master_base);

// recvd_answer must match data_answer

Please note that I wrote this code by heart. I'm not sure this it will compile without errors.