SPI from HPS through FPGA not working

All works.

root@socfpga:~# ./mem 0xfff00008

data = 0x00000001

root@socfpga:~# ./mem 0xfff00008 0 ;disable

root@socfpga:~# ./mem 0xfff00010 1 ;cs 0

root@socfpga:~# ./mem 0xfff00014 100 ; clock &per_base_clk / 100

root@socfpga:~# ./mem 0xfff00000 0xcf ; cpol cpha 16-bit

root@socfpga:~# ./mem 0xfff00008 1 ; enable

root@socfpga:~# ./mem 0xfff00060 ;read

data = 0x00000000

root@socfpga:~# ./mem 0xfff00060 256 ;write

root@socfpga:~# ./mem 0xfff00028 ;status

data = 0x0000000e ; RX not empty...

root@socfpga:~# ./mem 0xfff00024 ;rx data count

data = 0x00000001

root@socfpga:~# ./mem 0xfff00060 ;read

data = 0x0000040a

In QSYS SPI clock 100MHz

...

.hps_0_spim0_txd (temp_mosi), //mosi hps_0_spim0.txd

.hps_0_spim0_rxd (temp_miso), //miso .rxd

.hps_0_spim0_ss_in_n (), // .ss_in_n

.hps_0_spim0_ssi_oe_n (), // .ssi_oe_n

.hps_0_spim0_ss_0_n (temp_cs_n), // .ss_0_n

.hps_0_spim0_ss_1_n (), // .ss_1_n

.hps_0_spim0_ss_2_n (), // .ss_2_n

.hps_0_spim0_ss_3_n (), //sck .ss_3_n

.hps_0_spim0_sclk_out_clk (spi_sck) /**/

);

/**/

wire spi_sck;

assign temp_sclk=spi_sck & hps_fpga_reset_n;

hps_0_spim0: spi@0xfff00000 {

compatible = "snps,dw-spi-mmio-14.1", "snps,dw-spi-mmio";

reg = < 0xFFF00000 0x00000100 >;

interrupt-parent = < &hps_0_arm_gic_0 >;

interrupts = < 0 154 4 >;

# address-cells = < 1 >; /* embeddedsw.dts.params.#address-cells type NUMBER */

# size-cells = < 0 >; /* embeddedsw.dts.params.#size-cells type NUMBER */

bus-num = < 0 >; /* embeddedsw.dts.params.bus-num type NUMBER */

num-chipselect = < 1 >; /* embeddedsw.dts.params.num-chipselect type NUMBER */

status = "okay"; /* embeddedsw.dts.params.status type STRING */

clocks = < &per_base_clk >; /* appended from boardinfo */

spidev0: spidev@0 {

compatible = "spidev"; /* appended from boardinfo */

reg = < 4293918720 >; /* appended from boardinfo */

spi-max-frequency = < 100000000 >; /* appended from boardinfo */

enable-dma = < 1 >; /* appended from boardinfo */

}; //end spidev@0 (spidev0)

}; //end spi@0xfff00000 (hps_0_spim0)