SoC FPGA Ethernet Performance

Most of the limitation is on the SW side.

When talking 1Gbps using GigE, it's the raw bit rate of the Ethernet link.

See maximum efficiency in https://en.wikipedia.org/wiki/ethernet_frame.

In theory, 970Mbps is possible over GigE.

The DMA itself can transfer at 1 Gbps: it uses linked lists of descriptors+buffer and these have to be maintained/monitored by the SW and that'is one of the bottle neck.

Another bottle neck is for the processor to read the data / flush the caches, going across the L1 & L2 caches to access the external memory.

This said, I am of the same opinion as flz47655 that you shouldn't have major problems getting 1Gbps using 2 GigE links.

You may need to tweak a bit the SW and possibly dedicate one of the 2 cores for that.

Regards