Honored Contributor
Honored ContributorThis shows that everything is ok up to the phy level.
So you don't have any problem with ethernet link or cable. The problem can be due to the MAC, the sgdma or even the tcp stack. This is strange if you simply rebuilt a ready made reference design, without any change (this is what I think you did; is it correct?) I use a different dev board so I don't know if there is any hardware issue with yours. The only suggestion I can now think is that you can exclude tcp stack and check if raw ethernet frames are received: in the tse driver there is a function where all ethernet data is passing through. Unfortunately I can't remember its name; try locating arp_recv (or something like that), place a breakpoint in debug mode and then go backward until you find a function which filters some data. If you possibly find that no raw frame is received you have a problem with mac or sgdma configuration. One last idea: I see now that you are using a time limited version of sof file. Maybe you are using the OpenCore tse? In this case you should keep the connection with the programmer open or the tse core will stop working: don't close the reminder message box which appears after fpga configuration Regards
