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Altera_Forum
Honored Contributor
11 years agoOk, I solved it. In case anyone has the same confusion, here's the essential parts of the software that I was missing:
This might be overkill, but it works if you just map the entire hardware register space into virtual memory:#define HW_REGS_BASE ALT_STM_OFST
# define HW_REGS_SPAN 0x04000000
# define HW_REGS_MASK (HW_REGS_SPAN-1) Also, I needed to find the address offset of my module that I added as a component to Qsys (read this from the address map) #define MY_MODULE_OFST 0x00000000 Then, ignoring error checking, I took care of memory mapping like this: int virtual_base;
int fd;
fd = open("/dev/mem", (O_RDWR|O_SYNC));
virtual_base = mmap(NULL, HW_REGS_SPAN, (PROT_READ|PROT_WRITE), MAP_SHARED, fd, HW_REGS_BASE); Finally, reading and writing worked with: alt_write_word(virtual_base + ((ALT_LWFPGASLVS_OFST + MY_MODULE_OFST) & HW_REGS_MASK), write_val);
read_val = alt_read_word(Virtual_base + ((ALT_LWFPGASLVS_OFST + MY_MODULE_OFST) & HW_REGS_MASK));