Simple familly and package to run a NIOSII softcore at a non critical design

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I´m planning to create a new design composed of a CPU unit added with the usual resources ( timers, program and data memories, etc... ), including some built-in peripheral modules, such as 1 Ethernet, 1 USB, 1 UART and few IOs. I´m aware that probably there are available to sell some ARM-based off the shelf microcontroller IC which meets to these requirements, but I really want to do that with the NIOSII architecture.

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NIOS II take less than 3000 LEs and UART and IOs are not a problem but Ethernet and USB are.

They require usually external devices to handle these complex interfaces.

For USB 2.0 you can go with FT2232H while for Ethernet you need minimum an external Phy

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Do you think the part bellow could fit to the requirements for the project specified above, or is somewhat oversized ?

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It depends on your speed requirements also, why don't go with a DE2 or DE1-SoC board before than building a board on your own?

My initial dream was to purchase the DE2-115 dev kit from TerasIC, but due to issues related to excessive taxing and long time deliver to my country, the final cost would become quite prohibitive; this is my particular project, not corporate. Concerning to order the individual parts and assemble the board, at first sight could sound like no sence, but I have access to some assembling facilities which encourage to do like this.

By the way, still on the Cyclone IV family based on non-BGA package, do you know another part that could fit to the requirements for this design, or seems like the one above stay with the top features for the QFP derivative ?

Thanks once again.

Buy from distributors like Digikey, Mouser or Arrow for Academic Price.

If your budget is lower what about a BEMICROMAX10? Only 8k LEs but for learning with no project is fine.

You can add things like Ethernet and USB with GPIO connecting eval boards like UM232H and some other board for ethernet like http://www.emb4fun.de/fpga/nutos1

I appreciate the suggestion, but the initial purpose was to use the NIOSII architecture.

For some reason, I did not find any option on SOPC Builder to synthesize on MAX10, but just for the MAXII is available, and for this reason I should select a chip which not only complies with the QFP derivative package constraint, but also satisfy the system resources requirements.

I'm noting that I will not find any component that meets the conditions imposed above, and in having to choose one based on BGA, it might be better to base the design on a ready kit, as it was recommended earlier to me.

You can use NIOSII also with DE1-SOC that have an ARM. You simply don't use ARM and instantiate NIOS in FPGA logic.

MAX10 require latest version of Quartus (>= 14.0).

QSys replaced SOPC Builder that is obsolete.

Anyway a ready kit is better.