SGDMA debug

That should work as long as you plan on that to be the behavior all the time. I haven't thought this through much but the way I would implement it is use a falling edge detector on the fifo_empty signal and use that to reset the tail (read) address of the FIFO while leaving the head (write) address alone. Having a host keep track of where you are at might be a pain unless you have the last descriptor firing off an interrupt but I'm not sure if that matters to you.

The way I planned to tackle this was to have a prefetch block sit in front of the dispatcher and have it responsible for fetching descriptors out of memory and shoveling them into the dispatcher. I became sidetracked with a new and improved DMA that I'm perodically working on that should kill two birds with one stone so I never got back to making that prefetch block.