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Altera_Forum
Honored Contributor
14 years agoSGDMA async transfer fails
Hi guys, I'm creating a system on a cyclone3 development board. I also have a beMicro stick for testing. The system structure is based on the ethernet standard tutorial with QSYS. Then there i...
Altera_Forum
Honored Contributor
14 years agoHow is dma_buffer defined and how do you fill it? If your CPU has a data cache you must remember to flush the data cache before you start the transfer, or use uncached memory accesses.