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Altera_Forum
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14 years ago

sdram write/read in arria ii gx dev. board

Hi I am trying to write and read the DDR3 SDRAM on my Arria II Gx Dev. board with the following code. # include <stdio.h> # include "system.h" # include "altera_avalon_pio_regs.h" # inc...
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Altera_Forum
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14 years ago

Hi dsl

Thank you for the reply.

I'm using NIOS II/s as my cpu.

I think the data cache should be disabled by default.

In the "system.h", I also find "#define NIOS2_DCACHE_SIZE 0"

I try to use IOWR and IORD to access the memory instead of using the pointer, because another post in this forum mentioned that the pointer access can use the data cache.

The problem is still the same.