Forum Discussion
Altera_Forum
Honored Contributor
14 years agoIt turns out when i defined the base memory of SDRAM to be 0x00000000, and SRAM to be 0x0a800000, and lock them both without disconnecting any buses, everything works fine, SOPC builder can proceed with HDL generation.
I then conducted a memory test using the following code on SRAM, SDRAM, and on-chip RAM; alt_u32 test_sram( void ) { alt_u32 i, val; alt_u32 errors = 0; alt_u32 buffer[SRAM_MAX_WORDS]; /* write data to sram */ for( i = 0; i < SRAM_MAX_WORDS; i++ ) { buffer = i + 1000;}
/* Check output from SRAM */[/I] for( i = 0; i < SRAM_MAX_WORDS; i++ ) { if( buffer != (i+1000) )
errors++;
}
return( errors );
}
and it works!!, and now similarly for sdram(does not work:cry:), and on-chip ram (works!)
alt_u32 test_sdram( void ) {
alt_u32 i;
alt_u32 errors = 0;
alt_u32 *buffer = (alt_u32 *)sdram_base;
/* Write data to SDRAM */[/I] for( i = 0; i < SDRAM_MAX_WORDS; i++ ) { buffer = (i );
}
/* Check output from SDRAM */[/I] for( i = 0; i < SDRAM_MAX_WORDS; i++ ) { if( buffer[i] != (i) ) errors++; } return( errors );} Any idea why? something wrong with my code here? the program will just stall during SDRAM memory test... it is trapped in the writing loop. I just can't figure out why, maybe it is something to do with chip select?, since i have 2 separate 64MB chips combined to form a 128MB SRAM chip on DE2-115, that different command for memory allocation should be used?:confused: Thanks! Michael