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Honored Contributor
Honored ContributorSDR SDRAM memory tests
Hello, I've designed a board, with 5 separate SDR SDRAM chips, now I've got the PCBs and trying to test the memory reads/writes. 3 of the chips are working fine, however two of them behaves strang...
Altera_ForumHonored Contributor
Honored ContributorYep, I've entered BSP parameters and edited linker script pointing all .bss, .reset, etc stuff to on-chip ram. The RAM chip itself is connected only through data bus. Actually, I am not sure what's wrong. The test is simple: when I map pins in pin planner to working chip - test runs fine, when I map pins to non-working chip - it doesn't. Timing problems? 50MHz shouldn't be a big issue.
