Hi Klaus and Fischer,
I've struggled with many of the same issues ... and all related to PCI. In my case however, the
PCI bridge (configured as an adapter) implemented bus mastering. Needless to say, I had many
of those "locked up" moments -- mostly because there isn't an independent "CPU reset" vs. a
System Module reset 8-P
Anyway, the watchdog approach was reliable ... a bit slow ... but reliable. If you have an instruction
cache and you place that busy loop in a single line, you can spin without any bus activity.
Regards,
--Scott