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Burst transfers shouldn't make a big difference on an SRAM. As for the cache line size, as dsl says the size is in bytes and not bits. Each time a transfer is required between the cache and the main memory, a full line will be read/written. Whether 16 or 32 is better depends a lot on the application (both hardware and software). You can try both and see if one performs better than the other on your system.
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Thanks for explaining this. My present application involves storing and retrieving 16-bit audio samples, so this will be an important consideration.
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