Thanks for the answer.
I need to understand the adress I put at the converting program. Is it 200000h or 20000h?
Niv.
בתאריך 2 בינו׳ 2019 13:31, Intel Forums <
supportreplies@intel.com> כתב:
Hi NZami, The Cyclone 10 LP only support Remote System Update in Active Serial mode. You can refer to the existing Cyclone 10 LP Remote System Upgrade Design Example User Guide in the link below:
https://fpgawiki.intel.com/uploads/9/93/C10LP_RSU_Example_UG_170_v1.pdf The example design can be found from the link below:
https://fpgacloud.intel.com/devstore/platform/17.0.0/Standard/cyclone-10-lp-remote-system-update-design-example/ Application image boot address to be written to the Remote Update IP is obtained by truncating 2 LSB bits from the start address. The example below shows truncating 2 LSB bits from 0x200000h which results in 0x080000h. 0010 0000 0000 0000 0000 0000 --> 0000 1000 0000 0000 0000 0000 Then , in the Convert Programming File utilities, when setting the Application image start address, you need to set to 0x20000h. Regards, Nooraini
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Hi NZami,
The Cyclone 10 LP only support Remote System Update in Active Serial mode. You can refer to the existing Cyclone 10 LP Remote System Upgrade Design Example User Guide in the link below:
https://fpgawiki.intel.com/uploads/9/93/C10LP_RSU_Example_UG_170_v1.pdf<
https://urldefense.proofpoint.com/v2/url?u=https-3A__fpgawiki.intel.com_uploads_9_93_C10LP-5FRSU-5FExample-5FUG-5F170-5Fv1.pdf&d=DwMFaQ&c=euGZstcaTDllvimEN8b7jXrwqOf-v5A_CdpgnVfiiMM&r=6wL4d6ccMT80jh02goqOtZZt2NCC5Ff_LtTm9SXrJ60&m=mcrgEubXkDPbsU7gBiwvYyrCO1oOD6XqbUF-uv9lEzQ&s=e21jTDDulNUuVH6zV-mOCpAdPwz7wddWpNPbgBAX4co&e=>
The example design can be found from the link below:
https://fpgacloud.intel.com/devstore/platform/17.0.0/Standard/cyclone-10-lp-remote-system-update-design-example/<
https://urldefense.proofpoint.com/v2/url?u=https-3A__fpgacloud.intel.com_devstore_platform_17.0.0_Standard_cyclone-2D10-2Dlp-2Dremote-2Dsystem-2Dupdate-2Ddesign-2Dexample_&d=DwMFaQ&c=euGZstcaTDllvimEN8b7jXrwqOf-v5A_CdpgnVfiiMM&r=6wL4d6ccMT80jh02goqOtZZt2NCC5Ff_LtTm9SXrJ60&m=mcrgEubXkDPbsU7gBiwvYyrCO1oOD6XqbUF-uv9lEzQ&s=ZmHK5L_cuMOzbwcJRRu70U2J7ZSBTxIpw37XJN9_xMA&e=>
Application image boot address to be written to the Remote Update IP is obtained by truncating 2 LSB bits from the start address. The example below shows truncating 2 LSB bits from 0x200000h which results in 0x080000h.
0010 0000 0000 0000 0000 0000 --> 0000 1000 0000 0000 0000 0000
Then , in the Convert Programming File utilities, when setting the Application image start address, you need to set to 0x20000h.
Regards,
Nooraini
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remote update IP with cyclone10 LP
Hi,
I used the remote update core to load 2 images (factory and application) with cyclone III work with Active parallel mode. Now I try to load the 2 images to cyclone10 LP. I work now at Active Serial mode and S25FL128M flash.
there are some question I want to ask:
1. Dose the Remote Update IP work at cyclone10 LP?
2. The remote update core at cyclone III add 22 bits data_in bus and now I have 24 bits, how I load the start address of the application image 0x200000?
3. I generate jic file with 2 sof file (at 2 different pages) but only the factory image is loaded (page 0, start address 0x00), what could be the reason?
I enabled the REMOTE configuration option at quartus.
I working with Quartus Prime Lite 18.1
Niv.
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Hi NZami,
The Cyclone 10 LP only support Remote System Update in Active Serial mode. You can refer to the existing Cyclone 10 LP Remote System Upgrade Design Example User Guide in the link below:
https://fpgawiki.intel.com/uploads/9/93/C10LP_RSU_Example_UG_170_v1.pdf<
https://urldefense.proofpoint.com/v2/url?u=https-3A__fpgawiki.intel.com_uploads_9_93_C10LP-5FRSU-5FExample-5FUG-5F170-5Fv1.pdf&d=DwMFaQ&c=euGZstcaTDllvimEN8b7jXrwqOf-v5A_CdpgnVfiiMM&r=6wL4d6ccMT80jh02goqOtZZt2NCC5Ff_LtTm9SXrJ60&m=mcrgEubXkDPbsU7gBiwvYyrCO1oOD6XqbUF-uv9lEzQ&s=e21jTDDulNUuVH6zV-mOCpAdPwz7wddWpNPbgBAX4co&e=>
The example design can be found from the link below:
https://fpgacloud.intel.com/devstore/platform/17.0.0/Standard/cyclone-10-lp-remote-system-update-design-example/<
https://urldefense.proofpoint.com/v2/url?u=https-3A__fpgacloud.intel.com_devstore_platform_17.0.0_Standard_cyclone-2D10-2Dlp-2Dremote-2Dsystem-2Dupdate-2Ddesign-2Dexample_&d=DwMFaQ&c=euGZstcaTDllvimEN8b7jXrwqOf-v5A_CdpgnVfiiMM&r=6wL4d6ccMT80jh02goqOtZZt2NCC5Ff_LtTm9SXrJ60&m=mcrgEubXkDPbsU7gBiwvYyrCO1oOD6XqbUF-uv9lEzQ&s=ZmHK5L_cuMOzbwcJRRu70U2J7ZSBTxIpw37XJN9_xMA&e=>
Application image boot address to be written to the Remote Update IP is obtained by truncating 2 LSB bits from the start address. The example below shows truncating 2 LSB bits from 0x200000h which results in 0x080000h.
0010 0000 0000 0000 0000 0000 --> 0000 1000 0000 0000 0000 0000
Then , in the Convert Programming File utilities, when setting the Application image start address, you need to set to 0x20000h.
Regards,
Nooraini
Wednesday, 2 January 2019 13:32<
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