Honored Contributor
Honored Contributor--- quote end ---
--- quote start ---
i'm becoming very suspicious that our processor configuration isn't right. the cpu reset address is in sdram, so that's where the .entry section is ending up. your rom configuration shows the .entry section in flash along with .text, .rodata, etc. --- Quote End --- Probably makes sense - the Altera example design has a reset address at offset 0x0 in flash and an exception address at offset 0x20 in sdram. <div align='right'><{post_snapback}> (index.php?act=findpost&pid=19766)</div> [/b] --- Quote End --- Right. It's potentially dangerous to point a reset address at volatile memory. All of the examples point to offset 0....likely to the start of some bootloader code. - slacker
