Altera_Forum
Honored Contributor
15 years agoQuestion on "associatedClock" property of Avalon Slave
I am looking at generating a custom block of VHDL code that ideally will be seamless integration into the SOPC builder system. As I am reading the Avalon spec, I see the description for the "associatedClock" and I am reading it as a definition for a generic port. Since I am creating multiple components and the system may have as many as 7 different clocks, should I be creating a generic port mapping for this?