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Altera_Forum
Honored Contributor
15 years agoQuestion : Avalon OpenCores 10/100 Ethernet MAC TX problem
Hi All, I am experiencing strange behaviour with the transmit side of the OCM version 9.1, I have created a sof for a Cyclone II custom board that includes a Nios II/f, 16MB SDRAM (32bit datab...
Altera_Forum
Honored Contributor
15 years agoI used the same MAC and same PHY but I've never had such a problem. The only difference being I used version 9.0sp2.
Could it be a clock or timing problem? Is your design fully constrained? Do you get any negative slack report from TQ? You say the DP83848 is clocked by a 2.5MHz osc. Is this correct? AFAIK the correct clock frequency for this phy is 25MHz. Moreover, is this clock synchronized with the ones you use for mac rx and tx? Or do you use phy rx_clk and tx_clk output pins?