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Honored Contributor
Honored ContributorQsys to custom HW interface
My FPGA design, including a Nios II, resides mostly inside the Qsys environment. However, I have some custom hardware elements outside of Qsys. I need to pass data and control signals between the tw...
Altera_ForumHonored Contributor
Honored ContributorIf you can do it with SRAM, the same should work with on chip component, too.
You can expose the master signals or use those of a SRAM interface. Is your problem in exporting the interface out of Qsys block or did you implemented and connected everything but it doesn't work? The latter is definitely a problem in your component logic or timing related.
