Forum Discussion
Altera_Forum
Honored Contributor
8 years agoHi,
--- Quote Start --- Thank you so much for making it clear. Now I changed the path to only the mmu toolchain. I can perform a build but when I load it to the FPGA nothing displays. What can it be?$ nios2-download -g newzImage Using cable "USB-Blaster ", device 1, instance 0x00
Pausing target processor: OK
Initializing CPU cache (if present)
OK
Downloaded 5709KB in 29.2s (195.5KB/s)
Verified OK
Starting processor at address 0xC1000000
developer@1604:/opt/intelFPGA_lite/16.1/nios2eds$ nios2-terminal
nios2-terminal: connected to hardware target using JTAG UART on cable
nios2-terminal: "USB-Blaster ", device 1, instance 0
nios2-terminal: (Use the IDE stop button or Ctrl-C to terminate I had to make these changes to make it build: To build this thing on 64-bit ubuntu I had to do the following: $ LIBRARY_PATH=/usr/lib/x86_64-linux-gnu append the toolchain-mmu to your path $ PATH=$PATH:/home/developer/altera/nios2-linux/toolchain-mmu/x86-linux2/bin edit line 373 in /home/developer/altera/nios2-linux/linux-2.6/kernel/timeconst.pl and remove the define so that the conditions looks like: if (!@val) comment out line 2 //#define _POSIX_C_SOURCE 199309 in the file /home/developer/altera/nios2-linux/uClinux-dist/user/mtd-utils/36d8de81049c9c908740b690c664b5bd3703ccd6/serve_image.c edit the file /home/developer/altera/nios2-linux/uClinux-dist/vendors/Altera/nios2/Makefile and remove the references to syslog.conf and sc.cfg on line 12 Now the thing builds. --- Quote End --- Did you setup your hardware correctly? You need the system at least with Nios2 f-core, MMU, on-chip memory for the TLB exceptions, main memory, timer and jtag-uart. And also you must inform those base addresses and irq No. to your kernel for its configuration. Please refer to the next video for example. https://www.youtube.com/watch?v=rxlyezof0rs Kazu