Honored Contributor
Honored ContributorI figured that the upper four bits of the status register are in the byte following the lower byte in the memory map. The bytes must be stored in little-endian format, though no user guide mentions this.
Going by some threads, I figured that the IRRDY interrupt must be disabled. It worked for some guys. But unfortunately for me, even this is not working. RRDY simply refuses to go high. I checked the waveforms being transmitted from the PC. They look perfect. The biggest wonder is that even a simple loopback between Tx and Rx refuses to set the RRDY bit, even though I can see in the memory map that the byte written into the txdata register has got reflected in the rxdata register. This is in spite of the IRRDY interrupt being disabled. I have tried this in Quartus 11.1 and 13.1 with same effect. Any help will be greatly appreciated. regards, rajesh
