problem with LCD Refreshing rate

Actually why not memory-map your display buffer through your own logic?

So, during the avalon slave cycle latch the data and low address bits?

You also want to drive the avalon slave from the nios clock, and do your own clock domain crossing - since you can then do it async to the avalon cycle. You might have a clock crossing bridge.

Make sure your slave is 32bits wide - just ignore the high bits (maybe convert 8-8-8 to 5-5-5 at that point??).

If the nios can then do writes too fast, you could add a small fifo (data+address).