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Altera_Forum's avatar
Altera_Forum
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14 years ago

problem with custom istruction: clk_en never changes

hello i'm trying to do a multicycle custom instruction in oder to pilot a led. my problem is the fact that the clk_en never takes the value '1', it always remains to '0' (seen from signaltab...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

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There is an option/window somewhere on qsys that will display a gate level schematic of the fpga image. Although the cpu itself appears as a single 'blob', the mux around custom instructions and the way custom instructions are built is visible. This might be illuminating.

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i don't see this option on qsys...i have built my system on SOPC builder...