Altera_ForumHonored Contributor15 years agoproblem wih jtag_uart in Nios when use SSRAM Hello, I have created the project Nios + TSE + PIO + RS-232 + pll + jtag_uart + SSRAM. Reset vector and exception vector in SSRAM. Through the jtag_uart the Nios sends the statistical information ...Show More
Altera_ForumHonored Contributor15 years agomost likely there is something wrong with your byte enables.
Recent Discussionslicensing.altera.com never workedNiosV and juart-terminalNIOS V/m dbg_reset_out signal (Q25.1 Std, MAX10)JTAG_UART stuck in printfAshling IDE scripted project creation