Potential _interrupt_handler infinite loop

In addition to rugbybloke's comments: if this is a hardware issue a likely cause is the UART hardware irq output assumes that its IQR output is handled in an edge sensitive manner. That is, the UART asserts its interrupt pin for a while and then clears it on its own, assuming that whatever is being driven by its IRQ is edge sensitive.

In fact, wtih Avalon/Nios, IRQ is passed directly from a peripheral to the bus master (i.e. Nios processor) without any conditioning. Nios expects that once IRQ is asserted, it will be held there (level sensitive) until the processor & software have a chance to respond.

This is discussed in the Nios II Processor Reference Handbook section on Excpetion Processing.