Forum Discussion
Altera_Forum
Honored Contributor
15 years agoThe hardware will be ignoring the low bits, since it can't do misaligned transfers.
(It is possible to enable an interupt on such alignment errors.) So whatever happens, the generated instructions will have to read both 32bit words, then shift and mask the required parts together. Usually it is easiest to do (for little endian):p | p << 8 | p << 16 | p << 24With gcc you can mark data (or types) as having a smaller alignment using the __attribute__((aligned(n))) directive (this works for sparc, I don't know if it would require special code in the nios files). However you do need to apply it to the correct item, ie the memory item, not the pointer variable! I think this is: typedef long misaligned_long __attribute__((aligned(1)));
misaligned_long *p;However all this will do is cause the compiler to generate the shifts etc. (attribute packed can be used to get a similar effect on all the fields of a structure.)