Opencores I2C writing: Only 2 scl positive edges

I want to integrate Opencores I2C master IP core in one NIOS II projects. I have added it in the NIOS II system and compiled the project in Quartus II successfully.

I have enabled the pull-up features for the scl and sda pin in the quartus assignment editor.

The I2C master may work abnormally when my program tries to write a byte to the I2C slave. There are only two positive edges of scl for the i2c slave device address phase. There should be 9 positive edges of scl.

QUartus's version is 5.1 SP2. NIOS IDE's version is 5.1 SP1. I use Stratix 1S10 dev. kit to test the opencores I2C master core.

The codes is writing according the examples.

void i2c_write(unsigned char address, unsigned char data) {

i2c_wait_tip();

// write address

IOWR_I2C_TXR(address<<1);

IOWR_I2C_CR(I2C_CR_STA | I2C_CR_WR);

i2c_wait_tip();

// write data

IOWR_I2C_TXR(data);

IOWR_I2C_CR(I2C_CR_WR | I2C_CR_STO);

i2c_wait_tip();

}

Is the opencores I2C work well? How can I fix it?

How can I attach pictures in this forum? I can post the pictures.