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Altera_Forum
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14 years ago

Offset in received SPI data

Hi, I am currently working on a project in which altera FPGA is the slave SPI. Transferred data is 21 words long. Each test packet looks like: 0x0001, 0x0002, 0x0003,...,0x0021, and it cou...
Altera_Forum's avatar
Altera_Forum
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14 years ago

The SPI master functions should me similar to NIOS SPI master specification or else NIOS slave cant decode correctly

I think the CS should be low until all the bits are recieved and should go high