non-cacheable instruction memory

You might be having problems with the way the linker is configured to handle multiple code (and initialised data) sections. Although it usually causes different problems!

I'd run 'objdump -p <program>' on the linked elf image and have a look at the virtual and physical addresses of the various segments. Also look at the symbol table (nm -n <program>, or from objdump) to see what the linker put where. If things aren't where you expect the you need to fix the compile/link phases.

The linker script altera used to default to (might have changed since I last used it) puts all the initialised code/data physically following the end of the main code/data sections and expects initialisation code to copy it to the correct place. This is fine if you have a simple 'boot from flash' booter and are basing everything in external DRAM. It doesn't work otherwise!

The JTAG boot code will load all the loadable elf sections to their correct physical addresses (link with phys == virt). It wouldn't be hard to make a flash loader that did the same...