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Altera_Forum
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8 years ago

Niosll vga output

Hi all, I am designing a Nios ll classic processor based SOC for DE2-115 , when i studied its .v (soc instantiation) file i noticed that vga controller out ports i.e output wire [7:0] vg...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Hi,

Yes,ADV7123 is 10 Bits.And it can't be configured has 10 bit in present hardware.

It is used as 8-bit,That is DAC two LSB pins of R,G & B are grounded which shifts DAC offset.

Refer the schematic.

If you want to have R,G & B lower width than 8-bit you can achieve it by making lower LSB to logic 0 in your logic.

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

Best Regards,

Anand Raj Shankar

(This message was posted on behalf of Intel Corporation)