Honored Contributor
Honored ContributorYes I was suggesting using Signaltap to control your signals. You can use Signaltap even with the web edition and the opencore license evaluation, even if it is a bit more complicated. You need to run the Quartus programmer outside of Quartus (run it directly from C:\Altera\xx\quartus\bin\quartus_pgmw.exe) and then you can still use the other Quartus windows (including SignalTap) when running in evaluation mode.
Alternatively you can cable the Pll locked signal to a LED, but double check the polarity. Did you declare your clock source in the SDC file? This needs to be done manually, because Timequest won't get the source clock frequency automatically from derive_pll_clocks. It will just apply the multiplier/divider ratios, so if the source clock frequency isn't defined correctly, all the others will be bad too. In Timequest you can use the clocks report to check that all the frequencies were picked up correctly. What kind of timing failures do you have? It shouldn't be linked to PLL compensation.
