NIOS SDRAM hang up after reset

When you say that you connected the reset button to the PLL, do you mean that you reset the PLL when pressing the reset button? In that case you won't send a clock signal to the SDRAM when reset is pressed and if it is for a too long time it will probably cause refresh problems and it's not guaranteed that the contents of the SDRAM will survive the reset.

Is the CPU's reset vector set to the SDRAM?

I assume that memory_base is the address of the SDRAM? In that case by writing something at that base address, you overwrite the reset vector, probably causing the CPU to crash at reset.