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Altera_Forum
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9 years ago

Nios Read Data Never Appears on Nios Read Bus

In our Arria 10 design, we have a custom IP block for the Nios data and instruction memory. The underlying memory consists of two 4Kx32 memory blocks, shared with other 64-bit processing elements in...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Hi Ted,

Thanks again for the assist. It turns out that our custom component was pulling in an older RAM IP with two-cycle latency. With that remedied, it looks like it's working!!! I'll attach a waveform where Nios is simply reading a location, incrementing the value, writing it back, rinse, lather, repeat.