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Honored Contributor
Honored ContributorNios Read Data Never Appears on Nios Read Bus
In our Arria 10 design, we have a custom IP block for the Nios data and instruction memory. The underlying memory consists of two 4Kx32 memory blocks, shared with other 64-bit processing elements in...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- Just glancing but having been in your shoes, ... --- Quote End --- Thanks Ted! The original design included the data valid signal but Qsys indicated that it has been deprecated, so we removed it. The Qsys-generated logic seems to be generally correct but it sounds like we'll go back to providing the data valid signal ourselves.
