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Honored Contributor
Honored ContributorNios II/f and DDR4 memory with Arria 10 dev board
Has anyone used the Nios II/f with DDR4 memory using the Arria 10 SoC dev board. I've tried and only get errors about exceeding 32 address lines. If I reduce data width from 72 to 64, then fitter com...
Altera_ForumHonored Contributor
Honored ContributorI've used this before and yes, you need to reduce the data width to 32 if you can connecting the Nios data master to the Arria 10 External Memory Interface IP. I am using DDR3 and reduce the DQ pins/DQS group to 8, number of DQS group will then be 4.
