Nios II with on-chip Dual port ram between Nios and External DSP

You are mostly correct, except how "dummy" your module is depends on how (dis)similar your DSP memory controller is when compared to Avalon-MM.

If you want to skip creating the Qsys component, you can simply "export" the second (s1) port of the dual port RAM.

When you do that, in your top level module you will get a series of signals like this:

    unsaved u0 (
        .onchip_memory2_0_s2_address    (<connected-to-onchip_memory2_0_s2_address>),    //     onchip_memory2_0_s2.address
        .onchip_memory2_0_s2_chipselect (<connected-to-onchip_memory2_0_s2_chipselect>), //                        .chipselect
        .onchip_memory2_0_s2_clken      (<connected-to-onchip_memory2_0_s2_clken>),      //                        .clken
        .onchip_memory2_0_s2_readdata   (<connected-to-onchip_memory2_0_s2_readdata>),   //                        .readdata
        .onchip_memory2_0_s2_write      (<connected-to-onchip_memory2_0_s2_write>),      //                        .write
        .onchip_memory2_0_s2_writedata  (<connected-to-onchip_memory2_0_s2_writedata>),  //                        .writedata
        .onchip_memory2_0_s2_byteenable (<connected-to-onchip_memory2_0_s2_byteenable>), //                        .byteenable
        .onchip_memory2_0_clk2_clk      (<connected-to-onchip_memory2_0_clk2_clk>),      //   onchip_memory2_0_clk2.clk
        .onchip_memory2_0_reset2_reset  (<connected-to-onchip_memory2_0_reset2_reset>)   // onchip_memory2_0_reset2.reset
    );

which maybe is close enough for your system.