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Altera_Forum
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14 years ago

NIOS II Timer Interval Core Question!

Hi, I am trying to generate three different clock cycles; Given below is what i am trying to generate Clock1 ¯¯¯¯|_|¯|_|¯|_|¯|_|¯¯¯¯¯¯¯¯¯¯¯ Please note that clock 1 starts out high an...
Altera_Forum's avatar
Altera_Forum
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14 years ago

yes, "in sync" meaning multiple edges at the same time. But if this is not possible, then difference between them should be very minimum and easily reconfigurable. What do you think will be the best way to go for this? PLL? timer? or counter?