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SAN
New Contributor
New ContributorNIOS II SPI Slave with FIFO
Hi, I would like to receive N bytes of data using SPI(3 Wire Serial) IP in Qsys. All N bytes are transferred by the master during one chipset toggle. I implemented the RX interrupt, but I could se...
Vicky1
Regular Contributor
Regular ContributorHi,
Try to set the bits in control Register & then check status of the status Register.
Best Regards
Vikas Jathar
(This message was posted on behalf of Intel Corporation)
