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SAN's avatar
SAN
Icon for New Contributor rankNew Contributor
7 years ago

NIOS II SPI Slave with FIFO

Hi, I would like to receive N bytes of data using SPI(3 Wire Serial) IP in Qsys. All N bytes are transferred by the master during one chipset toggle. I implemented the RX interrupt, but I could se...
Vicky1's avatar
Vicky1
Icon for Regular Contributor rankRegular Contributor
7 years ago

Hi,

Try to set the bits in control Register & then check status of the status Register.

Best Regards

Vikas Jathar

(This message was posted on behalf of Intel Corporation)