NIOS II hung .. how to break in with the debugger ?

https://www.altera.com/support/support-resources/knowledge-base/solutions/rd04172014_563.html ........

This appears to describe the issue I see. The Avalon MM 128 bit fabric does not handle requests with byte enables of 0x1, 0x3 or 0x7 ... unfortunately the first case represents byte access and without that I can't use the PCIe IP from Altera.

I have cut and paste the Solution ID etc as well as included the image below ...

The problem is we are on Quartus 14.0.0 200 06 and note below indicate scheduled to be fixed in a future release ... I would have thought 14.0.0 would have it but maybe not .

Shouldn't the Solution ID but updated when it is fixed ..

I can't believe I am the only one stuck here ... do I nee dot go to Altera with a SR requesting a fix ? or is there an easier way.

I have reviewed the RTL for byte enable interconnect on the Avalon MM fabric, but if the issue is in the bridge to the PCIe HIP then it needs to be fixed there.

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Solution ID: rd04172014_563

Last Modified: May 02, 2014

Product Category: Intellectual Property

Product Area: Comm, Interface & Peripherals

Product Sub-area: Core Implementation

Version Found In: v13.1 update 4

Version Fixed In: N/A

Software: Quartus II Linux, Quartus II PC

Device Family: ARRIA V GT,ARRIA V GX,ARRIA V GZ,ARRIA V ST,ARRIA V SX,CYCLONE V GT,CYCLONE V GX,CYCLONE V ST,CYCLONE V SX,STRATIX V GS,STRATIX V GT,STRATIX V GX

IP Product: PCI Express 1/2/4/8 Lanes (x8)

Can the 128-bit Avalon-MM Txs slave interface of the Altera Hard IP for PCI Express handle read/write request with ByteEnable=0x01 ?

Description

Due to a problemin theQuartus® II software version 13.1 and earlier, the 128-bit Avalon-MM® Txs slave interface of the Hard IP for PCI Express® cannot generate a correct PCI Express TLPpacket when the ByteEnable = 0x01,0x03, or 0x7 at Avalon-MM interface.

Avalon-MM bridges operate correctly with a burst count = 1 and the following byte enables (DW Byte Enable)

16'hF000 16'h0F00 16'h00F0 16'h000F 16'hFF00 16'h0FF0 16'h00FF 16'hFFF0 16'h0FFF 16'hFFFF

Workaround / Fix

Use 64bit Avalon-MM Txs slave interface, or set ByteEnable to more than 0x07 (set 4 byte enable or more) with 128-bit Avalon-MM Txs slave interface within Quartus II software version 13.1 and earlier.

This problem is scheduled to be fixed in a future release of the Quartus II software.

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